Chapitre 3, 2 chipset, Northbridge chipset configuration – Asus M4A88TD-V EVO/USB3 Manuel d'utilisation
Page 83: Channel interleaving [xor of address bit, Enable clock to all dimms [disabled, Memclk tristate c3/atlvid [disabled, Dct unganged mode [always, Power down enable [disabled

ASUS M4A88TD-V EVO
3-23
Chapitre 3
NorthBridge Chipset Configuration
3.6.2
Chipset
Ce menu vous permet de modifier les paramètres du chipset. Sélectionnez un élément puis
appuyez sur <Entrée> pour en afficher le sous-menu.
BIOS SETUP UTILITY
Advanced
Advanced Chipset Settings
NorthBridge Configuration
Internal Configuration
Options for NB
BIOS SETUP UTILITY
Advanced
NorthBridge Chipset Configuration
DRAM Controller Configuration
ECC Configuration
DRAM Controller Configuration
Bank Interleaving [Auto]
Options de configuration : [Auto] [Disabled]
Channel Interleaving [XOR of Address bit]
Options de configuration : [Disabled] [Address bits 6] [Address bits 12]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]
Enable Clock to All DIMMs [Disabled]
Options de configuration : [Enabled] [Disabled]
MemClk Tristate C3/ATLVID [Disabled]
Options de configuration : [Disabled] [Enabled]
Memory Hole Remapping [Enabled]
Options de configuration : [Disabled] [Enabled]
DCT Unganged Mode [Always]
Options de configuration : [Auto] [Always]
Power Down Enable [Disabled]
Options de configuration : [Disabled] [Enabled]
BIOS SETUP UTILITY
Advanced
DRAM Controller Configuration
Bank Interleaving
[Auto]
Channel Interleaving
[XOR of Address bit]
Enable Clock to All DIMMs
[Disabled]
MemClk Tristate C3/ATLVID
[Disabled]
Memory Hole Remapping
[Enabled]
DCT Unganged Mode
[Auto]
Power Down Enable
[Disabled]
Enable Bank Memory
Interleaving