Dram timing control – Asus Crosshair Manuel d'utilisation
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Chapitre 4 : Le BIOS
CHA/CHB CKE Fine Delay [Auto]
Options de configuration : [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
[Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
delay] [3/64 MEMCLK delay] � [31/64 MEMCLK delay]
CHA/CHB CKE Setup Time [Auto]
Options de configuration : [Auto] [1/2 MEMCLK] [1 MEMCLK]
[Auto] [1/2 MEMCLK] [1 MEMCLK]
CHA/CHB C/S ODT Fine Delay [Auto]
Options de configuration : [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
[Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
delay] [3/64 MEMCLK delay] � [31/64 MEMCLK delay]
CHA/CHB C/S ODT Setup Time [Auto]
Options de configuration : [Auto] [1/2 MEMCLK] [1 MEMCLK]
[Auto] [1/2 MEMCLK] [1 MEMCLK]
CHA/CHB Add/CMD Fine Delay [Auto]
Options de configuration : [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
[Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK
delay] [3/64 MEMCLK delay] � [31/64 MEMCLK delay]
CHA/CHB Add/CMD Setup Time [Auto]
Options de configuration : [Auto] [1/2 MEMCLK] [1 MEMCLK]
[Auto] [1/2 MEMCLK] [1 MEMCLK]
Read DQS Timing Control [Auto]
Options de configuration : [Auto] [No delay] [1/96 MEMCLK delay] [2/96 MEMCLK
delay] [3/96 MEMCLK delay] � [47/96 MEMCLK delay]
DRAM Timing Control
F1:Help ↑↓ : Select Item
-/+: Change Value
F5: Setup Defaults
ESC: Exit →←: Select Menu
Enter: Select Sub-menu F10: Save and Exit
Select Menu
Item Specific Help
Press [Enter] to set.
Phoenix-Award BIOS CMOS Setup Utility
Extreme Tweaker
DRAM Timing Control
CHA CKE Fine Delay
[Auto]
CHB CKE Fine Delay
[Auto]
CHA CKE Setup Time
[Auto]
CHB CKE Setup Time
[Auto]
CHA CS/ODT Fine Delay
[Auto]
CHB CS/ODT Fine Delay
[Auto]
CHA CS/ODT Setup Time
[Auto]
CHB CS/ODT Setup Time
[Auto]
CHA Add/CMD Fine Delay
[Auto]
CHB Add/CMD Fine Delay
[Auto]
CHA Add/CMD Setup Time
[Auto]
CHB Add/CMD Setup Time
[Auto]
Read DQS Timing Control
[Auto]
Write Data Timing Control
[Auto]
DQS Receiver Enable Timing
[Auto]
R/W Queue Bypass [Auto]
Options de configuration : [Auto] [2x] [4x] [8x] [16x]
[Auto] [2x] [4x] [8x] [16x]
Dynamic Idle Cycle Counter [Auto]
Options de configuration : [Auto] [Disabled] [Enabled]
[Auto] [Disabled] [Enabled]
Idle Cycle Limit [Auto]
Options de configuration : [Auto] [0 cycles] [4 cycles] [8 cycles] [16 cycles] [32
[Auto] [0 cycles] [4 cycles] [8 cycles] [16 cycles] [32
cycles]
[64 cycles] [128 cycles] [256 cycles]
DCQ Bypass Maximum [Auto]
Options de configuration : [Auto] [0x] [1x] [2x]�[15x]
[Auto] [0x] [1x] [2x]�[15x]
DRAM Burst Length [Auto]
Options de configuration : [Auto] [64-byte] [32-byte]
[Auto] [64-byte] [32-byte]
DRAM Bank Interleaving [Enabled]
Options de configuration : [Disabled] [Enabled]
[Disabled] [Enabled]